As is known from the past, an inverter circuitry is a circuitry which transforms a DC power into an AC power with variable frequency and variable voltage with high efficiency by switching controlling of transistors.
And, an inverter circuitry is widely applied to home electric devices and industrial devices which are required controlling of rotation numbers or a torque of a motor, for example.
In general, a diode-bridge circuitry having a simple circuit configuration is employed for transforming an AC power into a DC power, and a smoothing capacitor having a large capacitance is employed for removing voltage ripples which appear in rectified voltage.
In this case, disadvantages arise such that a power factor in power side is lowered, and harmonics are increased. For preventing or suppressing such disadvantages, a power factor improvement reactor having a large inductance is connected to input side or DC side of the diode-bridge circuitry (refer to FIG. 18).
In recent years, it is proposed that a chopper comprising a transistor, diode and the like, is provided in the DC side of the diode-bridge circuitry, for the purpose of improvement in characteristics for power source power factor and power source harmonics (refer to FIG. 20).
When such inverter circuitry is employed, a smoothing capacitor having a large capacitance and a power factor improvement reactor are needed. Therefore, disadvantages arise such that a size becomes greater following the employment of those elements, and increase in cost is realized.
For realizing high performance in power source harmonics characteristics, a chopper circuitry is further needed. Therefore, further increase in cost is realized.
An electrolytic capacitor is generally employed as the smoothing capacitor having a large capacitance. Therefore, disadvantages arise such that a lifetime of an inverter circuitry including a diode-bridge circuitry becomes shorter due to a short lifetime of an electrolytic capacitor, and usage environment of an inverter circuitry including a diode-bridge circuitry is limited due to thermal characteristics of an electrolytic capacitor.
To dissolve those disadvantages, an inverter controlling method is proposed (refer to “Inverter controlling method of a PM motor having a diode rectification circuitry with a high input power factor”, Isao Takahashi, Heisei 12 nen (2000) denkigaklcai (Electronics Institute) zennkoku taikai (national convention), p1591, which is referred to Article 1 hereinafter). The inverter controlling method realizes increasing input power factor and improvement in performance of power source harmonics characteristics by allowing motor currents flowing into a motor even when a DC voltages pulsates and greatly lowered, and consequently widening a conduction width of an inverter input (input of a rectification circuitry) which are due to omitting a smoothing capacitor having a large capacitance in a rectification section, varying a d-axis current with a frequency which is twice of a power frequency, lowering motor terminal voltages by field weakening control.
When this method is employed, an input power factor of a rectification circuitry is improved by controlling an output of an inverter connected to the rectification circuitry to have a desired waveform. Decreasing in power source harmonics can be expected. Therefore, an electrolytic capacitor having a large capacitance, reactor, and chopper become unnecessary which are conventionally necessary to realize those advantages.
Further, “High efficiency inverter controlling method of IPM motor with weak field”, Jin Haga, Isao Takahashi, Heisei 13 nen (2001) denkigakkai. (Electronics Institute) zennkoku taikai (national convention), p1214 (referred to Article 2 hereinafter) is proposed as a controlling method based upon the Article 1.
When the inverter circuitry having the arrangement of FIG. 18 is employed, an AC power is rectified by the diode-bridge rectification circuitry, and is smoothened by the electrolytic capacitor having a large capacitor (for example, about 2000 μF for motor capacitance of 2.2 kW). This smoothened output is supplied to the inverter for driving the motor.
When an inverter circuitry is employed for home devices, a reactor (about 3.5 mH when a capacitance of a capacitor is 2000 μF) is connected between a rectification circuitry and a capacitor, or between an AC power and a rectification circuitry, for improving a power factor.
FIG. 19 shows the DC voltage (the voltage between both terminals of the electrolytic capacitor) Vdc, the power current (the current flows from the AC power to the rectification circuitry) i1, the absolute value |vi| of the AC voltage obtained by the rectification of the rectification circuitry, and a fundamental component of the power current ii of the inverter circuitry of FIG. 18. The absolute value |vi| of the AC voltage and the fundamental component of the power current i1 are not values which are directly measured from the, inverter circuitry.
φ in FIG. 19 represents a phase difference between the AC voltage vi and the fundamental wave of the power current i1, that is a power factor.
The power factor cos φ of the inverter circuitry of FIG. 18 is low and is up to about 80% (φ=37°. When the magnitude of the absolute value |vi| of the AC voltage exceeds the smoothened voltage Vdc between terminals of the electrolytic capacitor, the diode of the rectification circuitry turns on and the power current i1 flows therein. Therefore, the waveform of the power current i1 is deformed, and the magnitudes of low harmonics (third, 5-th, 7-th, and the like) are extremely large which are obtained by the harmonic analysis of the power current i1, which are not illustrated. A reactor having a large inductance value is needed for a filter for eliminating low harmonics. Therefore, disadvantages arise such that increase in cost, and increase in entire size of the inverter device.
An inverter circuitry of FIG. 20 further includes a chopper circuitry comprising a transistor Tc and diode Dc. By controlling the transistor Tc to turn on, the power current can be flows therein even for a period when the power current i1 does not flow therein for the inverter circuitry of FIG. 18 (a period when the voltage Vdc between terminals of the electrolytic capacitor exceeds the amplitude of the absolute value |vi| of the AC voltage). And, the power current i1 can be made to have a sine shape by adequately controlling the on-duty of the transistor Tc. Reverse flow of the current from the capacitor to the transistor Tc is prevented by the diode Dc.
But, the inverter circuitry of FIG. 20 requires not only the transistor Tc and diode Dc but also a circuitry for controlling the transistors Tc in comparison with the inverter circuitry of FIG. 18. Therefore, it becomes very difficult that the inverter circuitry of FIG. 20 is employed in home electric devices.
FIG. 21 shows an inverter circuitry disclosed in the Article 1 for dissolving those problems.
The inverter circuitry of FIG. 21 is different from the inverter of FIG. 18 in that a capacitor having small capacitance (for example, a capacitor having capacitance of about 1/100 capacitance value) is employed instead the electrolytic capacitor having large capacitance.
When the inverter circuitry of FIG. 21 (hereinafter, referred to as condenser-less inverter circuitry) is employed, the DC voltage changes from Vmax (the maximum value of the power voltage v1) to Vmin, determined in correspondence with the induction voltage generated by the motor along the absolute value |vi| of the power voltage, as is illustrated in FIG. 22, by adequately controlling the currents flowing in the motor through the inverter, because the capacitance of the capacitor is very small. Wherein, Vmin can be controlled by the field control of the motor.
As a result, waveform distortion of the power current i1 becomes smaller with respect to the case of FIG. 19.
When the flowing period of the power current i1 is determined to be θ, the power factor cos φ can be calculated by an equation (1).cos φ=√{square root over ((θ+sin θ)/π)}  equation (1)
From the equation (1), the power factor (cos φ) becomes equal to or more than 97% when Vmax/Vmin{=cos(θ/2)}>2.
FIG. 23 is a block diagram illustrating an arrangement of an inverter controlling apparatus for controlling an IPM motor using the inverter circuitry of FIG. 21 and for implementing the controlling method disclosed in the Article 2 for obtaining desired performance.
This inverter controlling apparatus comprises a PI operation section 111, sin2 θ1 generation section 112, and q-axis current command operation section 110. The PI operation section 111 receives a deviation of a speed command ωm* and a real motor speed ωm as an input, and outputs a value |iq*| by carrying out PI operation (proportional and integral operation). The sin2 θ1 generation section 112 receives a power voltage v1 as an input and outputs a signal sin2 θ1 which is in synchronism with the power voltage. The q-axis current command operation section 110 obtains a product of the signal sin2 θi and the value |iq*|, and outputs the product as a q-axis current command iq*.
This inverter controlling apparatus further comprises an id* operation section 114, PI operation sections 115 and 116 for d-axis and q-axis, and a non-interacting controlling section 117. The id* operation section 114 receives a DC voltage Vdc, q-axis current iq, and a real motor speed ωm as inputs, and outputs a d-axis current command id* by carrying out the operation of equation (2). The PI operation sections 115 and 116 receives deviations of dq-axes current commands id* and iq* and dq-axes real currents id and iq and output first dq-axes voltage commands vd* and vq* by carrying out PI operation. The non-interacting controlling section 117 receives the first dq-axes voltage commands vd*′ and vq*′ as inputs and outputs second dq-axes voltage commands vd* and vq* by carrying out the operation of equation (3).
                                          i            d            *                    =                                    -                                                λ                  a                                                  L                  d                                                      +                                                                                (                                          vdc                                              n                        ·                                                  ω                          m                                                                                      )                                    2                                -                                                      (                                                                  L                        q                                            ·                                              i                        q                                                              )                                    2                                                                    ⁢                                                      Equation        ⁢                                  ⁢                  (          2          )                                                              v            q            *                    =                                                    v                q                *                            ′                        +                                          (                                                      λ                    a                                    +                                                            L                      d                                        ·                                          i                      d                                                                      )                            ·              n              ·                              ω                m                                                    ⁢                                  ⁢                              v            d            *                    =                                                    v                d                *                            ′                        -                                          L                q                            ·                              i                q                            ·              n              ·                              ω                m                                                                        Equation        ⁢                                  ⁢                  (          3          )                    
It is thought that the power current i1 illustrated in FIG. 22 can be obtained when the inverter controlling apparatus of FIG. 23 is employed, and when the q-axis current is controlled to be iq*sin2 θ1.
FIG. 24 is a diagram illustrating waveforms in a case that a DC voltage (voltage between both terminals of a capacitor) is controlled from Vmax to 0 by the field control of a motor. For convenience, a phase θ2 is applied Fourier transformation by determining a phase to be 0° (360°) which corresponds to the maximum value of the DC voltage Vdc, so that an equation (4) is obtained.
                                          v                          d              ⁢                                                          ⁢              c                                =                                                    2                ·                                  V                  max                                            π                        ⁢                          {                              1                +                                                      ∑                                          n                      =                      1                                        ∞                                    ⁢                                                                                    [                                                                                                                                            (                                                                  -                                  1                                                                )                                                            n                                                                                                                      2                                ⁢                                n                                                            +                              1                                                                                +                                                                                                                    (                                                                  -                                  1                                                                )                                                                                            n                                +                                1                                                                                                                                                    2                                ⁢                                n                                                            -                              1                                                                                                      ]                                            ·                      cos                                        ⁢                                                                                  ⁢                    n                    ⁢                                                                                  ⁢                                          θ                      2                                                                                  }                                      ⁢                                  ⁢                  Wherein          ,                                    θ              2                        =                          2              ⁢                                                          ⁢              •              ⁢                                                          ⁢                              θ                1                            ⁢                                                          ⁢                              (                                                      θ                    1                                    ⁢                                                                          ⁢                  is                  ⁢                                                                          ⁢                  a                  ⁢                                                                          ⁢                  power                  ⁢                                                                          ⁢                  voltage                  ⁢                                                                          ⁢                  phase                                )                                                                        Equation        ⁢                                  ⁢                  (          4          )                    
A magnitude of a current amplitude becomes an equation (5) which current flows through a capacitor due to an AC component in a DC voltage Vdc.
                                                                    i              chn                                            =                                    2              ⁢                              π                ·                                  f                                      2                    ⁢                    n                                                  ·                C                ·                                                                        v                    dchn                                                                                          =                          4              ·                              f                                  2                  ⁢                  n                                            ·              C              ·                              V                max                            ·                              {                                                                                                    (                                                  -                          1                                                )                                            n                                                                                      2                        ⁢                        n                                            +                      1                                                        +                                                                                    (                                                  -                          1                                                )                                                                    n                        +                        1                                                                                                            2                        ⁢                        n                                            -                      1                                                                      }                                                    ⁢                                  ⁢                  herein          ,                                    f                              2                ⁢                n                                      =                          2              ⁢                                                          ⁢              •              ⁢                                                          ⁢              n              ⁢                                                          ⁢              •              ⁢                                                          ⁢                              f                1                            ⁢                                                          ⁢                              (                                                                            f                      1                                        ⁢                                          :                                        ⁢                                                                                  ⁢                    power                    ⁢                                                                                  ⁢                    frequency                                    ,                                      n                    =                    1                                    ,                  2                  ,                                      3                    ⁢                                                                                  ⁢                    •                    ⁢                                                                                  ⁢                    •                                                  ⁢                                                                  )                                                                        Equation        ⁢                                  ⁢                  (          5          )                    
When Vmax=283 V (power voltage effective value=200 V, power frequency is 50 Hz), an amplitude Vdch1 of twice frequency component with respect to a power frequency (n=1 in the equation (4)) becomes 120 V.
When a capacitance of a capacitor is determined to be 20 μF which is 1/100 of the conventional capacitance, a magnitude of the current becomes |Vch1|=1.5 A from the equation (5). And, the phase becomes a phase which is illustrated in FIG. 24.
FIG. 25 shows an ideal controlling waveform thought in the Article 2 (a power current i1 when a DC voltage vdc can be adjusted from 0 to Vmax), capacitor current ich1, and a distortion of a power current waveform when only the controlling of the Article 2 is carried out that is no compensation is made for the capacitor current ich1. In practice, ich2, ich3,   flow, but illustration is omitted for convenience.
That is, in the inverter controlling apparatus of FIG. 21, the DC voltage vdc greatly pulsates, includes AC component having a large amplitude. Therefore, currents ich1, ich2, ich3,   which flow into the capacitor from the power source through the single-phase rectification circuitry, are generated so-that the power current waveform is distorted.
Disadvantage arises that harmonics of the power current (input current) i1 cannot be controlled to be smaller (in ideal, cannot be controlled to be a sine wave) when the capacitor current is not compensated.
The present invention was made in view of the above problems.
It is an object of the present invention to provide an inverter controlling method and apparatus thereof which can carry out controlling for suppressing a current flowing into a capacitor from a power source through a single-phase rectification circuitry.